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» Design and Analysis of a Robust Pipelined Memory System
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CODES
2005
IEEE
14 years 1 months ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...
EMSOFT
2007
Springer
14 years 1 months ago
Buffer optimization and dispatching scheme for embedded systems with behavioral transparency
Software components are modular and can enable post-deployment update, but their high overhead in runtime and memory is prohibitive for many embedded systems. This paper proposes ...
Jiwon Hahn, Pai H. Chou
ACSD
2010
IEEE
224views Hardware» more  ACSD 2010»
13 years 5 months ago
Robustness of Sequential Circuits
Digital components play a central role in the design of complex embedded systems. These components are interconnected with other, possibly analog, devices and the physical environm...
Laurent Doyen, Thomas A. Henzinger, Axel Legay, De...
VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
14 years 8 months ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
SAMOS
2004
Springer
14 years 1 months ago
DIF: An Interchange Format for Dataflow-Based Design Tools
The dataflow interchange format (DIF) is a textual language that is geared towards capturing the semantics of graphical design tools for DSP system design. A key objective of DIF i...
Chia-Jui Hsu, Fuat Keceli, Ming-Yung Ko, Shahrooz ...