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» Design and Analysis of a Robust Pipelined Memory System
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ICCAD
2010
IEEE
109views Hardware» more  ICCAD 2010»
13 years 5 months ago
Misleading energy and performance claims in sub/near threshold digital systems
Abstract-- Many of us in the field of ultra-low-Vdd processors experience difficulty in assessing the sub/near threshold circuit techniques proposed by earlier papers. This paper i...
Yu Pu, Xin Zhang, Jim Huang, Atsushi Muramatsu, Ma...
IBPRIA
2005
Springer
14 years 1 months ago
A Real-Time Driver Visual Attention Monitoring System
Abstract. This paper describes a framework for analyzing video sequences of a driver and determining his level of attention. The proposed system deals with the computation of eyeli...
Jorge Batista
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 8 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
ISPASS
2009
IEEE
14 years 2 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
ICIP
2005
IEEE
14 years 9 months ago
Game-theoretic analysis of a semi-fragile watermarking scheme based on SCS
Semi-fragile watermarking can be used to detect illegal and local manipulation of images, while being robust towards legal manipulations such as lossy compression. This paper desc...
Jean-Philippe Boyer, Pierre Duhamel, Jacques Blanc...