1084 search results - page 56 / 217 » Design and Evaluation of a Selective Compressed Memory Syste... |
147
Voted
ICCAD
2009
IEEE
15 years 1 months ago
2009
IEEE
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
156
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CODES
2006
IEEE
15 years 10 months ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
144
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ASPDAC
1998
ACM
15 years 8 months ago
1998
ACM
We developed a new modular synthesis approach for design of low-power core-based data-intensive application-specific systems on silicon. The power optimization is conducted in th...
156
Voted
EUROPAR
2000
Springer
15 years 7 months ago
2000
Springer
Abstract. Current approaches to parallel I/O demand extensive user effort to obtain acceptable performance. This is in part due to difficulties in understanding the characteristics...
126
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IPPS
2006
IEEE
15 years 10 months ago
2006
IEEE
This paper presents a helper thread prefetching scheme that is designed to work on loosely-coupled processors, such as in a standard chip multi-processor (CMP) system and in an in...