243 search results - page 4 / 49 » Design and Implementation of a CFAR Processor for Target Det... |
ICS
2001
Tsinghua U.
14 years 4 days ago
2001
Tsinghua U.
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...
ACSAC
2005
IEEE
14 years 1 months ago
2005
IEEE
An increasing variety of malware, such as worms, spyware and adware, threatens both personal and business computing. Remotely controlled bot networks of compromised systems are gr...
ICFP
2010
ACM
13 years 8 months ago
2010
ACM
The leading implementations of graph reduction all target conventional processors designed for low-level imperative execution. In this paper, we present a processor specially desi...
NSDI
2008
13 years 10 months ago
2008
Hidden malicious circuits provide an attacker with a stealthy attack vector. As they occupy a layer below the entire software stack, malicious circuits can bypass traditional defe...
ICCAD
1996
IEEE
13 years 12 months ago
1996
IEEE
Abstract - Using the
exibility provided by multiple functionalities we have developed a new approach for permanent fault-tolerance: Heterogeneous BuiltIn-Resiliency (HBIR). HBIR p...