Sciweavers

249 search results - page 18 / 50
» Design and Implementation of the NUMAchine Multiprocessor
Sort
View
FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
14 years 2 months ago
A Scalable FPGA-based Multiprocessor
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...
DAC
2008
ACM
14 years 9 months ago
Predictive runtime verification of multi-processor SoCs in SystemC
Concurrent interaction of multi-processor systems result in errors which are difficult to find. Traditional simulationbased verification techniques remove the concurrency informat...
Alper Sen, Vinit Ogale, Magdy S. Abadir
CODES
2002
IEEE
14 years 1 months ago
Hardware support for real-time embedded multiprocessor system-on-a-chip memory management
The aggressive evolution of the semiconductor industry — smaller process geometries, higher densities, and greater chip complexity — has provided design engineers the means to...
Mohamed Shalan, Vincent John Mooney III
VLDB
2001
ACM
149views Database» more  VLDB 2001»
14 years 26 days ago
Cache-Conscious Concurrency Control of Main-Memory Indexes on Shared-Memory Multiprocessor Systems
Recent research addressed the importance of optimizing L2 cache utilization in the design of main memory indexes and proposed the so-called cache-conscious indexes such as the CSB...
Sang Kyun Cha, Sangyong Hwang, Kihong Kim, Keunjoo...
PPL
2008
185views more  PPL 2008»
13 years 8 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...