249 search results - page 46 / 50 » Design and Implementation of the NUMAchine Multiprocessor |
PPOPP
2010
ACM
14 years 3 months ago
2010
ACM
To fully exploit multicore processors, applications are expected to provide a large degree of thread-level parallelism. While adequate for low core counts and their typical worklo...
CODES
2007
IEEE
14 years 2 months ago
2007
IEEE
Memory requirements of intellectual property components (IP) in contemporary multi-processor systems-on-chip are increasing. Large high-speed external memories, such as DDR2 SDRAM...
SAMOS
2004
Springer
14 years 1 months ago
2004
Springer
This paper presents a model for instruction-level distributed computing that allows the implementation of scalable chip multiprocessors. Based on explicit microthreading it serves ...
CASES
2000
ACM
14 years 24 days ago
2000
ACM
Dealing with global on-chip memory allocation/de-allocation in a dynamic yet deterministic way is an important issue for upcoming billion transistor multiprocessor System-on-a-Chi...
ISCA
2006
IEEE
14 years 2 months ago
2006
IEEE
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...