427 search results - page 11 / 86 » Design and application of multimodal power gating structures |
163
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ISLPED
2004
ACM
15 years 11 months ago
2004
ACM
In an attempt to enable the cost-effective production of lowand mid-volume application-specific chips, researchers have proposed a number of so-called structured ASIC architectur...
136
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ISLPED
2006
ACM
15 years 11 months ago
2006
ACM
In a few technology generations, limitations of fabrication processes will make accurate design time power estimates a daunting challenge. Static leakage current which comprises a...
152
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SLIP
2009
ACM
16 years 10 days ago
2009
ACM
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...
120
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DATE
2006
IEEE
15 years 12 months ago
2006
IEEE
: In this research, a fixed-point multimedia co-processor is designed and tested into an ARM-10 based mobile graphics processor for portable 2-D and 3-D multimedia applications. Th...
118
Voted
ISCAS
2008
IEEE
16 years 7 days ago
2008
IEEE
— This article explores the effect of using source follower buffers (SFB) at the output of source coupled logic (SCL) circuits. This technique can help to improve the power-delay...