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» Design and evaluation of an auto-memoization processor
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MICRO
2006
IEEE
114views Hardware» more  MICRO 2006»
14 years 1 months ago
Authentication Control Point and Its Implications For Secure Processor Design
Secure processor architecture enables tamper-proof protection on software that addresses many difficult security problems such as reverse-engineering prevention, trusted computing...
Weidong Shi, Hsien-Hsin S. Lee
DAC
2010
ACM
13 years 11 months ago
Cost-aware three-dimensional (3D) many-core multiprocessor design
The emerging three-dimensional integrated circuit (3D IC) is beneficial for various applications from both area and performance perspectives. While the general trend in processor...
Jishen Zhao, Xiangyu Dong, Yuan Xie
ASAP
2007
IEEE
153views Hardware» more  ASAP 2007»
13 years 7 months ago
Performance Evaluation of Adaptive Routing Algorithms for achieving Fault Tolerance in NoC Fabrics
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...
Haibo Zhu, Partha Pratim Pande, Cristian Grecu
ICPP
2009
IEEE
13 years 5 months ago
Thread Merging Schemes for Multithreaded Clustered VLIW Processors
Several multithreading techniques have been proposed to reduce the resource underutilization in Very Long Instruction Word (VLIW) processors. Simultaneous MultiThreading (SMT) is ...
Manoj Gupta, Fermín Sánchez, Josep L...
FCCM
2008
IEEE
114views VLSI» more  FCCM 2008»
14 years 2 months ago
Scaling Soft Processor Systems
As FPGA-based systems including soft-processors become increasingly common we are motivated to better understand the best way to scale the performance of such systems. In this pap...
Martin Labrecque, Peter Yiannacouras, J. Gregory S...