620 search results - page 40 / 124 » Design and evaluation of an auto-memoization processor |
137
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SC
1992
ACM
15 years 8 months ago
1992
ACM
Exploiting parallelism at both the multiprocessor level and the instruction level is an e ective means for supercomputers to achieve high-performance. The amount of instruction-le...
161
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MICRO
2010
IEEE
15 years 2 months ago
2010
IEEE
This paper presents a task-centric memory model for 1000-core compute accelerators. Visual computing applications are emerging as an important class of workloads that can exploit ...
125
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DAC
2008
ACM
16 years 5 months ago
2008
ACM
Exponential increases in architectural design complexity threaten to make traditional processor design optimization techniques intractable. Genetically programmed response surface...
126
Voted
ISCA
2000
IEEE
15 years 8 months ago
2000
IEEE
As microprocessors continue to evolve, many optimizations reach a point of diminishing returns. We introduce HLS, a hybrid processor simulator which uses statistical models and sy...
145
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ISCAS
2006
IEEE
15 years 10 months ago
2006
IEEE
Abstract— There is a clear trend of future embedded systems in moving toward wireless, multimedia, multi-functional and ubiquitous applications. This emerges new challenges in th...