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VLSID
2002
IEEE
149views VLSI» more  VLSID 2002»
14 years 7 months ago
Development of ASIC Chip-Set for High-End Network Processing Application-A Case Study
Choosing the right methodology is a significant step towards successful VLSI designs. Traditional methodologies and tools are no longer adequate to handle large and complex design...
Sanjeev Patel
DATE
2006
IEEE
171views Hardware» more  DATE 2006»
14 years 1 months ago
4G applications, architectures, design methodology and tools for MPSoC
transistors the design of the SoC needs to be moved to a higher level of abstraction. We need to think in processors and interconnects rather than gates and wires. We discuss the n...
ISQED
2007
IEEE
104views Hardware» more  ISQED 2007»
14 years 1 months ago
System Level Estimation of Interconnect Length in the Presence of IP Blocks
With the increasing size and sophistication of circuits and specifically in the presence of IP blocks, new wirelength estimation methods are needed in the design flow of large-sca...
Taraneh Taghavi, Ani Nahapetian, Majid Sarrafzadeh
DAC
2007
ACM
13 years 11 months ago
Verification Methodologies in a TLM-to-RTL Design Flow
SoC based system developments commonly employ ESL design ogies and utilize multiple levels of abstract models to provide feasibility study models for architects and development pl...
Atsushi Kasuya, Tesh Tesfaye
ICCS
2007
Springer
13 years 11 months ago
Formal Verification of Analog and Mixed Signal Designs in Mathematica
In this paper, we show how symbolic algebra in Mathematica can be used to formally verify analog and mixed signal designs. The verification methodology is based on combining induct...
Mohamed H. Zaki, Ghiath Al Sammane, Sofiène...