59 search results - page 10 / 12 » Design for Verification in System-level Models and RTL |
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
VTC
2006
IEEE
2006
IEEE
Design and Implementation of Robust Time/Frequency Offset Tracking Algorithm for MIMO-OFDM Receivers
14 years 1 months ago
— In this paper, the robust time and frequency offset tracking algorithms and architecture for high throughput wireless local area network (WLAN) systems are presented. The desig...
25
Voted
CODES
1999
IEEE
13 years 12 months ago
1999
IEEE
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...
MICRO
2008
IEEE
13 years 7 months ago
2008
IEEE
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Mutation analysis is a widely-adopted strategy in software testing with two main purposes: measuring the quality of test suites, and identifying redundant code in programs. Simila...