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» Design issues for dynamic voltage scaling
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HPCA
2008
IEEE
14 years 7 months ago
System level analysis of fast, per-core DVFS using on-chip switching regulators
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known techniq...
Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, Dav...
CASES
2006
ACM
14 years 1 months ago
Methods for power optimization in distributed embedded systems with real-time requirements
Dynamic voltage scaling and sleep state control have been shown to be extremely effective in reducing energy consumption in CMOS circuits. Though plenty of research papers have st...
Razvan Racu, Arne Hamann, Rolf Ernst, Bren Mochock...
DATE
2007
IEEE
141views Hardware» more  DATE 2007»
13 years 11 months ago
Energy-efficient real-time task scheduling with task rejection
In the past decade, energy-efficiency has been an important system design issue in both hardware and software managements. For mobile applications with critical missions, both ene...
Jian-Jia Chen, Tei-Wei Kuo, Chia-Lin Yang, Ku-Jei ...
DAC
2010
ACM
13 years 11 months ago
Circuit modeling for practical many-core architecture design exploration
Current tools for computer architecture design lack standard support for multi- and many-core development. We propose using circuit models to describe the multiple processor archi...
Dean Truong, Bevan M. Baas
DATE
2009
IEEE
101views Hardware» more  DATE 2009»
14 years 2 months ago
A monitor interconnect and support subsystem for multicore processors
Abstract— In many current SoCs, the architectural interface to onchip monitors is ad hoc and inefficient. In this paper, a new architectural approach which advocates the use of a...
Sailaja Madduri, Ramakrishna Vadlamani, Wayne Burl...