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» Design methodology for IRA codes
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ASE
2008
102views more  ASE 2008»
13 years 10 months ago
Model driven code checking
Model checkers were originally developed to support the formal verification of high-level design models of distributed system designs. Over the years, they have become unmatched in...
Gerard J. Holzmann, Rajeev Joshi, Alex Groce
ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
14 years 2 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
CODES
2005
IEEE
14 years 3 months ago
System-level design automation tools for digital microfluidic biochips
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
Krishnendu Chakrabarty, Fei Su
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
14 years 2 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
SOFTVIS
2005
ACM
14 years 3 months ago
CVSscan: visualization of code evolution
During the life cycle of a software system, the source code is changed many times. We study how developers can be enabled to get insight in these changes, in order to understand t...
Lucian Voinea, Alexandru Telea, Jarke J. van Wijk