343 search results - page 41 / 69 » Design methodology for IRA codes |
CODES
2005
IEEE
14 years 3 months ago
2005
IEEE
The ability to continue increasing processor frequency and single thread performance is being severely limited by exponential increases in leakage and active power. To continue to...
ICCAD
1994
IEEE
14 years 2 months ago
1994
IEEE
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
CODES
2004
IEEE
14 years 1 months ago
2004
IEEE
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
JPDC
2008
13 years 9 months ago
2008
Cluster computing has become an essential issue for designing immersive visualization systems. This paradigm employs scalable clusters of commodity computers with much lower costs...
AOSE
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. Nowadays, information systems have to perform in complex, heterogeneous environments, considering a variety of system users with different needs and preferences. Software...