343 search results - page 44 / 69 » Design methodology for IRA codes |
DATE
2000
IEEE
14 years 2 months ago
2000
IEEE
-- One of the greatest challenges in C/C++-based design methodology is to efficiently map C/C++ models into hardware. Many of the networking and multimedia applications implemente...
GLVLSI
1998
IEEE
14 years 2 months ago
1998
IEEE
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
DAC
1997
ACM
14 years 2 months ago
1997
ACM
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
DATE
1999
IEEE
14 years 2 months ago
1999
IEEE
As society has become more reliant on electronics, the need for fault tolerant ICs has increased. This has resulted in signi cant research into both fault tolerant controller desi...
IPPS
1999
IEEE
14 years 2 months ago
1999
IEEE
A structured approach to parallel programming allows to construct applications by composing skeletons, i.e., recurring patterns of task- and data-parallelism. First academic and co...