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DAC
2004
ACM
14 years 8 months ago
High level cache simulation for heterogeneous multiprocessors
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Don...
ENTCS
2007
81views more  ENTCS 2007»
13 years 7 months ago
Error Diagnosis in Equivalence Checking of High Performance Microprocessors
We describe techniques for diagnosing errors in formal equivalence checking of RTL and transistor level models of high performance microprocessors at Freescale Semiconductor Inc. ...
Alper Sen
DAC
2007
ACM
14 years 8 months ago
Shared Resource Access Attributes for High-Level Contention Models
Emerging single-chip heterogeneous multiprocessors feature hundreds of design elements contending for shared resources, making it difficult to isolate performance impacts of indiv...
Alex Bobrek, JoAnn M. Paul, Donald E. Thomas
AAI
2000
122views more  AAI 2000»
13 years 7 months ago
High-Level Interpretation in Virtual Environments
: As Virtual Environments applications become more complex, there is a need to interpret user interaction in terms of high-level concepts. In this paper, we investigate the relatio...
Marc Cavazza, Ian Palmer
SAMOS
2004
Springer
14 years 29 days ago
A High-Level Programming Paradigm for SystemC
The SystemC language plays an increasingly important role in the system-level design domain, facilitating designers to start with modeling and simulating system components and thei...
Mark Thompson, Andy D. Pimentel