253 search results - page 4 / 51 » Design of a logic element for implementing an asynchronous F... |
APCCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
— We present a design technique for implementing asynchronous ALUs with CMOS domino logic and delay insensitive dual rail four-phase logic. It ensures economy in silicon area and...
TCAD
2002
13 years 7 months ago
2002
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper describes a novel design methodology to implement a secure DPA resistant crypto processor. The methodology is suitable for integration in a common automated standard ce...
ASYNC
2000
IEEE
14 years 1 days ago
2000
IEEE
In this paper we describe a complete design methodology for a globally asynchronous onchip communication network connecting both locally-synchronous and asynchronous modules. Sync...
JUCS
2007
13 years 7 months ago
2007
: The development of processors with full custom technology has some disadvantages, such as the time used to design the processors and the cost of the implementation. In this artic...