253 search results - page 9 / 51 » Design of a logic element for implementing an asynchronous F... |
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
ICC
2007
IEEE
14 years 1 months ago
2007
IEEE
— The FPGA design of an adaptive antenna array beamformer is presented. The complex-valued array weights are calculated using the MVDR algorithm whose implementation is based on ...
FPGA
2006
ACM
13 years 11 months ago
2006
ACM
In this paper, we propose a technique to flexibly implement genetic algorithms for various problems on FPGAs. For the purpose, we propose a basic architecture for GA which consist...
FPGA
2004
ACM
14 years 1 months ago
2004
ACM
We consider active leakage power dissipation in FPGAs and present a “no cost” approach for active leakage reduction. It is well-known that the leakage power consumed by a digi...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
This paper presents FPGA implementations of the DES and Triple-DES with improved security against power analysis attacks. The proposed designs use Boolean masking, a previously in...