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» Design of the MUC-6 evaluation
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ICCAD
2003
IEEE
142views Hardware» more  ICCAD 2003»
14 years 4 months ago
SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation
The recent demand for system-on-chip RF mixed-signal design and aggressive supply-voltage reduction require chip-level accurate analysis of both the substrate and power delivery s...
Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Ch...
ICCCN
2007
IEEE
14 years 2 months ago
Evaluating Xen for Router Virtualization
— In this paper, we evaluate the performance of a software IP router forwarding plane inside the Xen virtual machine monitor environment with a view to identifying (some) design ...
Norbert Egi, Adam Greenhalgh, Mark Handley, Micka&...
ISCAS
2007
IEEE
104views Hardware» more  ISCAS 2007»
14 years 2 months ago
Evaluation of Algorithms for Low Energy Mapping onto NoCs
—Systems on Chip (SoCs) congregate multiple modules and advanced interconnection schemes, such as networks on chip (NoCs). One relevant problem in SoC design is module mapping on...
César A. M. Marcon, Edson I. Moreno, Ney La...
FPL
2001
Springer
87views Hardware» more  FPL 2001»
14 years 14 days ago
Parameterized Function Evaluation for FPGAs
This paper presents parameterized module-generators for pipelined function evaluation using lookup tables, adders, shifters and multipliers. We discuss trade-offs involved between...
Oskar Mencer, Nicolas Boullis, Wayne Luk, Henry St...
TMM
2010
143views Management» more  TMM 2010»
13 years 2 months ago
A Comparison of Perceptually-Based Metrics for Objective Evaluation of Geometry Processing
Recent advances in 3D graphics technologies have led to an increasing use of processing techniques on 3D meshes, such as filtering, compression, watermarking, simplification, defor...
Guillaume Lavoué, Massimiliano Corsini