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» Designing Fast Asynchronous Circuits
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DATE
2002
IEEE
97views Hardware» more  DATE 2002»
14 years 1 months ago
Fast Method to Include Parasitic Coupling in Circuit Simulations
S-parameter based circuit simulators are used a lot for the design of microwave circuits. The accuracy of these simulators is limited by the fact that they do not take the electro...
B. L. A. Van Thielen, G. A. E. Vandenbosch
FPGA
2004
ACM
121views FPGA» more  FPGA 2004»
14 years 2 months ago
Highly pipelined asynchronous FPGAs
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
John Teifel, Rajit Manohar
ASYNC
1999
IEEE
110views Hardware» more  ASYNC 1999»
14 years 28 days ago
Verification of Delayed-Reset Domino Circuits Using ATACS
This paper discusses the application of the timing analysis tool ATACS to the high performance, self-resetting and delayed-reset domino circuits being designed at IBM's Austi...
Wendy Belluomini, Chris J. Myers, H. Peter Hofstee
CHES
2006
Springer
146views Cryptology» more  CHES 2006»
14 years 11 days ago
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits
This paper presents a Path Swapping (PS) method which enables to enhance the security of Quasi Delay Insensitive Asynchronous Circuits against Power Analysis (PA) attack. This appr...
G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin
GLVLSI
2009
IEEE
201views VLSI» more  GLVLSI 2009»
13 years 12 months ago
Glitch-free design for multi-threshold CMOS NCL circuits
In this paper, a novel design is proposed for eliminating glitches and signal bounces during wake-up events that result from incorporating multi-threshold CMOS (MTCMOS) into async...
Ahmad Al Zahrani, Andrew Bailey, Guoyuan Fu, Jia D...