Process variation has become a critical problem in modern VLSI fabrication. In the presence of process variation, buffer insertion problem under performance constraints becomes mo...
We present a formulation of retiming to minimize the number of registers in a design by iterating a maximum network flow problem. The retiming returned will be the optimum one whi...
Aaron P. Hurst, Alan Mishchenko, Robert K. Brayton
Many current integrated circuits designs, such as those released for the ISPD2005[14] placement contest, are extremely large and can contain a great deal of white space. These new...
As current silicon-based techniques fast approach their practical limits, the investigation of nanoscale electronics, devices and system architectures becomes a central research p...
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...