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» Designing Fast Asynchronous Circuits
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ISPD
2010
ACM
207views Hardware» more  ISPD 2010»
14 years 2 months ago
FOARS: FLUTE based obstacle-avoiding rectilinear steiner tree construction
Obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) construction is becoming one of the most sought after problems in modern design flow. In this paper we present FOARS, ...
Gaurav Ajwani, Chris Chu, Wai-Kei Mak
ICCAD
1999
IEEE
90views Hardware» more  ICCAD 1999»
13 years 11 months ago
An implicit connection graph maze routing algorithm for ECO routing
Abstract-- ECO routing is a very important design capability in advanced IC, MCM and PCB designs when additional routings need to be made at the latter stage of the physical design...
Jason Cong, Jie Fang, Kei-Yong Khoo
DAC
2012
ACM
11 years 10 months ago
Chip/package co-analysis of thermo-mechanical stress and reliability in TSV-based 3D ICs
In this work, we propose a fast and accurate chip/package thermomechanical stress and reliability co-analysis tool for TSV-based 3D ICs. We also present a design optimization meth...
Moongon Jung, David Z. Pan, Sung Kyu Lim
ISLPED
2003
ACM
95views Hardware» more  ISLPED 2003»
14 years 22 days ago
Power efficient comparators for long arguments in superscalar processors
Traditional pulldown comparators that are used to implement associativeaddressing logic in superscalar microprocessors dissipate energy on a mismatch in any bit position in the co...
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad ...
ISQED
2005
IEEE
81views Hardware» more  ISQED 2005»
14 years 1 months ago
Exact Algorithms for Coupling Capacitance Minimization by Adding One Metal Layer
Due to the rapid development of manufacturing process technology and tight marketing schedule, the chip design and manufacturing always work toward an integrated solution to achie...
Hua Xiang, Kai-Yuan Chao, Martin D. F. Wong