397 search results - page 70 / 80 » Designing Fast Asynchronous Circuits |
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Abstract-- In nanometer-scale VLSI technologies, several interconnect issues like routing congestion and interconnect delay have become the main concerns in placement. However, all...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
We present applications of a recently developed automated nonlinear macromodelling approach to the important problem of macromodelling high-speed output buffers/drivers. Good nonl...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
The wiring effort and thus, the routability of electronic designs such as printed circuit boards, multi chip modules and single chip modules largely depends on the assignment of s...
CF
2006
ACM
14 years 1 months ago
2006
ACM
In this paper, we present a nano-scale reconfigurable mesh that is interconnected with ferromagnetic spin-wave buses. The architecture described here, while requiring the same num...
ISCA
2003
IEEE
14 years 23 days ago
2003
IEEE
To achieve high instruction throughput, instruction schedulers must be capable of producing high-quality schedules that maximize functional unit utilization while at the same time...