54 search results - page 5 / 11 » Designing Leakage Aware Multipliers |
ISVLSI
2008
IEEE
14 years 1 months ago
2008
IEEE
Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of dig...
EUC
2004
Springer
14 years 3 days ago
2004
Springer
Abstract. Power consumption is becoming one of the most important constraints for microprocessor design in nanometer-scale technologies. Especially, as the transistor supply voltag...
ISCAS
2005
IEEE
14 years 9 days ago
2005
IEEE
—A low-power high-SFDR CMOS direct digital frequency synthesizer (DDFS) is presented. Several design techniques, including a cell-based lookup table, a power aware parameters sel...
VLSID
2010
IEEE
13 years 5 months ago
2010
IEEE
Due to the inherent nature of heat flow in 3D integrated circuits, stacked dies exhibit a wide range of thermal characteristics. The strong dependence of leakage with temperature...
ISLPED
2009
ACM
14 years 1 months ago
2009
ACM
In this paper, we observe that minimum energy Emin of subthreshold logic dramatically increases when reaching 45 nm node. We demonstrate by circuit simulation and analytical model...