2945 search results - page 137 / 589 » Designing and Implementing Malicious Hardware |
135
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HICSS
1994
IEEE
15 years 8 months ago
1994
IEEE
Shared memory architectures often have caches to reduce the number of slow remote memory accesses. The largest possible caches exist in shared memory architectures called Cache-On...
136
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DATE
2008
IEEE
15 years 11 months ago
2008
IEEE
Transaction Level Modeling (TLM) is an emerging design practice for overcoming increasing design complexity. It aims at simplifying the design flow of embedded systems ning and v...
118
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DATE
2007
IEEE
15 years 11 months ago
2007
IEEE
A vast literature has been published on Statistical Static Timing Analysis (SSTA), its motivations, its different implementations and their runtime/accuracy trade-offs. However, v...
108
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EH
2003
IEEE
15 years 10 months ago
2003
IEEE
No silicon fabrication and characterization of circuits with topologies designed by evolution has been done before, leaving open questions about the feasibility of the evolutionar...
145
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EUROMICRO
2007
IEEE
15 years 11 months ago
2007
IEEE
Multicast network services advantageously complement multimedia information and communication technologies, as they open up the realm for highly scalable multicustomer application...