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» Designing and Implementing Malicious Hardware
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CSE
2009
IEEE
15 years 10 months ago
On the Design of a Suitable Hardware Platform for Protocol Stack Processing in LTE Terminals
—In this paper we present a design methodology for the identification and development of a suitable hardware platform (including dedicated hardware accelerators) for the data pl...
Sebastian Hessel, David Szczesny, Shadi Traboulsi,...
180
Voted
AHS
2007
IEEE
349views Hardware» more  AHS 2007»
15 years 10 months ago
A Low Power Implementation of H.264 Adaptive Deblocking Filter Algorithm
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
Mustafa Parlak, Ilker Hamzaoglu
112
Voted
DATE
2007
IEEE
139views Hardware» more  DATE 2007»
15 years 10 months ago
Efficient high-performance ASIC implementation of JPEG-LS encoder
- This paper introduces an innovative design which implements a high-performance JPEG-LS encoder. The encoding process follows the principles of the JPEG-LS lossless mode. The prop...
Markos Papadonikolakis, Vasilleios Pantazis, Athan...
VLSID
2009
IEEE
177views VLSI» more  VLSID 2009»
16 years 4 months ago
Accelerating System-Level Design Tasks Using Commodity Graphics Hardware: A Case Study
Many system-level design tasks (e.g. timing analysis, hardware/software partitioning and design space exploration) involve computational kernels that are intractable (usually NP-ha...
Unmesh D. Bordoloi, Samarjit Chakraborty
DAC
2008
ACM
15 years 5 months ago
SHIELD: a software hardware design methodology for security and reliability of MPSoCs
Security of MPSoCs is an emerging area of concern in embedded systems. Security is jeopardized by code injection attacks, which are the most common types of software attacks. Prev...
Krutartha Patel, Sri Parameswaran