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DFT
2003
IEEE
132views VLSI» more  DFT 2003»
15 years 9 months ago
Level-Hybrid Optoelectronic TESH Interconnection Network
This paper discusses a hybrid optoelectronic scheme for a new interconnection network, "Tori connected mESHes (TESH)". The major features of TESH are the following: it i...
Vijay K. Jain, Glenn H. Chapman
ISCAS
2003
IEEE
148views Hardware» more  ISCAS 2003»
15 years 9 months ago
Hybrid neural network architecture for age identification of ancient Kannada scripts
Wide research has been carried out and is still taking place in the field of character recognition of handwritten English characters. Recognizing English characters is much simple...
Harish K. Kashyap, Bansilal, P. Arun Koushik
DAC
2003
ACM
15 years 9 months ago
Test application time and volume compression through seed overlapping
We propose in this paper an extension on the Scan Chain Concealment technique to further reduce test time and volume requirement. The proposed methodology stems from the architect...
Wenjing Rao, Ismet Bayraktaroglu, Alex Orailoglu
ISLPED
2003
ACM
91views Hardware» more  ISLPED 2003»
15 years 9 months ago
Reducing reorder buffer complexity through selective operand caching
Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...
Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad ...
EUROCAST
2003
Springer
135views Hardware» more  EUROCAST 2003»
15 years 9 months ago
White Matter Mapping in DT-MRI Using Geometric Flows
Abstract. We present a 3D geometric flow designed to evolve in Diffusion Tensor Magnetic Resonance Images(DT-MRI) along fiber tracts by measuring the diffusive similarity betwe...
Lisa Jonasson, Patric Hagmann, Xavier Bresson, Ret...