2945 search results - page 52 / 589 » Designing and Implementing Malicious Hardware |
126
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DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
The allocation of device variables on I/O registers affects the code size and performance of an I/O device driver. This work seeks the allocation with the minimal software or hard...
130
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DATE
2005
IEEE
15 years 9 months ago
2005
IEEE
In this paper, we present power emulation, a novel design paradigm that utilizes hardware acceleration for the purpose of fast power estimation. Power emulation is based on the ob...
129
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ARC
2008
Springer
15 years 6 months ago
2008
Springer
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
133
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FPL
2010
Springer
15 years 2 months ago
2010
Springer
Abstract--The second round of the NIST-run public competition is underway to find a new hash algorithm(s) for inclusion in the NIST Secure Hash Standard (SHA-3). This paper present...
142
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DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...