2945 search results - page 76 / 589 » Designing and Implementing Malicious Hardware |
141
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GLOBECOM
2006
IEEE
15 years 10 months ago
2006
IEEE
Abstract−Several high performance LDPC codes have paritycheck matrices composed of permutation submatrices. We design a parallel-serial architecture to map the decoder of any str...
122
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CAV
1994
Springer
15 years 8 months ago
1994
Springer
Relational Coarsest Partition Problems (RCPPs) play a vital role in verifying concurrent systems. It is known that RCPPs are P-complete and hence it may not be possible to design ...
ASPDAC
2007
ACM
15 years 8 months ago
2007
ACM
Abstract-- A complementary ferroelectriccapacitor (CFC) logic-circuit style is proposed for a compact and standby-power-free content-addressable memory (CAM). Since the use of the ...
128
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DATE
2003
IEEE
15 years 9 months ago
2003
IEEE
In this paper we present an hardware implementation of the RSA algorithm for public-key cryptography. The RSA algorithm consists in the computation of modular exponentials on larg...
161
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FPL
2000
Springer
15 years 8 months ago
2000
Springer
This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state as...