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ACMDIS
2010
ACM
13 years 10 months ago
Coffee maker patterns and the design of energy feedback artefacts
Smart electricity meters and home displays are being installed in people's homes with the assumption that households will make the necessary efforts to reduce their electrici...
Loove Broms, Cecilia Katzeff, Magnus Bång, &...
ISQED
2008
IEEE
124views Hardware» more  ISQED 2008»
14 years 4 months ago
Parasitic Aware Process Variation Tolerant Voltage Controlled Oscillator (VCO) Design
In this paper we present a parasitic aware, process variation tolerant optimization methodology that may be applied to nanoscale circuits to ensure better yield. A currentstarved ...
Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos
ICNC
2005
Springer
14 years 3 months ago
A Game-Theoretic Approach for Designing Mixed Mutation Strategies
Abstract. Different mutation operators have been proposed in evolutionary programming. However, each operator may be efficient in solving a subset of problems, but will fail in an...
Jun He, Xin Yao
DATE
2003
IEEE
86views Hardware» more  DATE 2003»
14 years 3 months ago
PLFire: A Visualization Tool for Asynchronous Phased Logic Designs
We present a visualization tool called PLFire, which allows a user to observe the behavior of a Phased Logic (PL) circuit. Phased logic is a technique for realizing self-timed cir...
Kenneth Fazel, Mitchell A. Thornton, Robert B. Ree...
ISCAS
2003
IEEE
331views Hardware» more  ISCAS 2003»
14 years 3 months ago
Design of ultra high-speed CMOS CML buffers and latches
Abstract - A comprehensive study of ultra high-speed currentmode logic (CML) buffers and regenerative CML latches will be illustrated. A new design procedure to systematically desi...
Payam Heydari, Ravindran Mohanavelu