49 search results - page 6 / 10 » Designing logic circuits for probabilistic computation in th... |
SIGMOD
2012
ACM
11 years 11 months ago
2012
ACM
While extensive work has been done on evaluating queries over tuple-independent probabilistic databases, query evaluation over correlated data has received much less attention eve...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
With increasing aggregate off-chip bandwidths exceeding terabits/second (Tb/s), the power dissipation is a serious design consideration. Additionally, design of I/O links is const...
SLIP
2003
ACM
14 years 1 months ago
2003
ACM
Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on adjacent wires on long bus lines can increase delay...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
DAC
1998
ACM
14 years 22 days ago
1998
ACM
Interconnect-driven optimization is an increasingly important step in high-performance design. Algorithms for buffer insertion have been successfully utilized to reduce delay in gl...