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» Designing secure systems on reconfigurable hardware
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DFT
2006
IEEE
203views VLSI» more  DFT 2006»
14 years 1 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...
DATE
2004
IEEE
136views Hardware» more  DATE 2004»
13 years 11 months ago
An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems
Recently a lot of multimedia applications are emerging on portable appliances. They require both the flexibility of upgradeable devices (traditionally software based) and a powerf...
Michele Borgatti, Andrea Capello, Umberto Rossi, J...
ICCD
2001
IEEE
112views Hardware» more  ICCD 2001»
14 years 4 months ago
Run-Time Execution of Reconfigurable Hardware in a Java Environment
We present tools that support the runtime execution of applications that mix software running on networks of workstations and reconfigurable hardware. We use JHDL to describe the ...
Laurie A. Smith King, Heather Quinn, Miriam Leeser...
RSP
2000
IEEE
100views Control Systems» more  RSP 2000»
13 years 11 months ago
A Hardware Virtual Machine for the Networked Reconfiguration
Networked reconfiguration is an enabling technology for cost effective service deployment and maintenance. A hardware virtual machine to enable this networked reconfigurapresented...
Yajun Ha, Patrick Schaumont, Marc Engels, Serge Ve...
FPL
2006
Springer
96views Hardware» more  FPL 2006»
13 years 11 months ago
High Speed Document Clustering in Reconfigurable Hardware
High-performance document clustering systems enable similar documents to automatically self-organize into groups. In the past, the large amount of computational time needed to clu...
G. Adam Covington, Charles L. G. Comstock, Andrew ...