1226 search results - page 11 / 246 » Designing systems-on-chip using cores |
ATS
2000
IEEE
14 years 3 days ago
2000
IEEE
Testing of embedded cores is very difficult in SOC (system-on-a-chip), since the core user may not know the gate level implementation of the core, and the controllability and obse...
MICRO
2007
IEEE
13 years 7 months ago
2007
IEEE
Design complexity is rapidly becoming a limiting factor in the design of modern, high-performance microprocessors. This paper introduces an optimization technique to improve the e...
ASPDAC
2004
ACM
13 years 11 months ago
2004
ACM
- Globally-Asynchronous, Locally-Synchronous (GALS) design style has started to gain interest recently as a possible solution to the increased design complexity, power and thermal ...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
We present a new approach for TAM optimization and test scheduling in the modular testing of mixed-signal SOCs. A test planning approach for digital SOCs is extended to handle ana...
TVLSI
2008
13 years 7 months ago
2008
Reconfigurable hardware is ideal for use in Systems-on-a-Chip, as it provides both hardware-level performance and post-fabrication flexibility. However, any one architecture is ra...