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ISCAS
2007
IEEE
161views Hardware» more  ISCAS 2007»
14 years 1 months ago
Hardware Architecture of a Parallel Pattern Matching Engine
Abstract— Several network security and QoS applications require detecting multiple string matches in the packet payload by comparing it against predefined pattern set. This proc...
Meeta Yadav, Ashwini Venkatachaliah, Paul D. Franz...
CLUSTER
2009
IEEE
14 years 2 months ago
Integrating software distributed shared memory and message passing programming
Abstract—Software Distributed Shared Memory (SDSM) systems provide programmers with a shared memory programming environment across distributed memory architectures. In contrast t...
H'sien J. Wong, Alistair P. Rendell
DATE
2005
IEEE
135views Hardware» more  DATE 2005»
14 years 1 months ago
Compositional Memory Systems for Multimedia Communicating Tasks
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
CAMP
2000
IEEE
13 years 12 months ago
An FPGA Architecture for High Speed Edge and Corner Detection
This paper presents an FPGA based architecture for high speed edge and corner detection. Applications targeted are in high speed computer vision (i.e. more than 100 images per sec...
Cesar Torres-Huitzil, Miguel Arias-Estrada
ICA3PP
2009
Springer
14 years 4 days ago
A Software Transactional Memory Service for Grids
In-memory data sharing for grids allow location-transparent access to data stored in volatile memory. Existing Grid middlewares typ- ically support only explicit data transfer betw...
Kim-Thomas Möller, Marc-Florian Müller, ...