60 search results - page 6 / 12 » Deterministic Clock Gating for Microprocessor Power Reductio... |
HPCA
1999
IEEE
13 years 12 months ago
1999
IEEE
In general-purpose microprocessors, recent trends have pushed towards 64-bit word widths, primarily to accommodate the large addressing needs of some programs. Many integer proble...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
Power dissipation is quickly becoming one of the most important limiters in nanometer IC design for leakage increases exponentially as the technology scaling down. However, power ...
TVLSI
2010
13 years 2 months ago
2010
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
MICRO
2002
IEEE
14 years 14 days ago
2002
IEEE
We describe the design, analysis, and performance of an on–line algorithm to dynamically control the frequency/voltage of a Multiple Clock Domain (MCD) microarchitecture. The MC...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
—Noise-tolerant XOR-based conditional keeper for high fan-in dynamic circuits is presented in this paper. Noise immunity is enhanced by conditionally turning on the conditional k...