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» Device and Technology Challenges for Nanoscale CMOS
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SECRYPT
2010
214views Business» more  SECRYPT 2010»
13 years 7 months ago
Nanonetworks - A New Frontier in Communications
Nanotechnology is enabling the development of devices in a scale ranging from one to a few one hundred nanometers. Nanonetworks, i.e., the interconnection of nano-scale devices, a...
Ian F. Akyildiz
MJ
2006
67views more  MJ 2006»
13 years 9 months ago
Review of CMOS image sensors
The role of CMOS Image Sensors since their birth around the 1960s, has been changing a lot. Unlike the past, current CMOS Image Sensors are becoming competitive with regard to Cha...
M. Bigas, Enric Cabruja, Josep Forest, Joaquim Sal...
TC
2008
13 years 9 months ago
Analysis of Mask-Based Nanowire Decoders
Stochastically assembled nanoscale architectures have the potential to achieve device densities 100 times greater than today's CMOS. A key challenge facing nanotechnologies is...
Eric Rachlin, John E. Savage
ICCAD
2009
IEEE
87views Hardware» more  ICCAD 2009»
13 years 6 months ago
The synthesis of combinational logic to generate probabilities
As CMOS devices are scaled down into the nanometer regime, concerns about reliability are mounting. Instead of viewing nanoscale characteristics as an impediment, technologies suc...
Weikang Qian, Marc D. Riedel, Kia Bazargan, David ...
ISCA
2008
IEEE
135views Hardware» more  ISCA 2008»
14 years 3 months ago
ReVIVaL: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency
Process variations are poised to significantly degrade performance benefits sought by moving to the next nanoscale technology node. Parameter fluctuations in devices can introd...
Xiaoyao Liang, Gu-Yeon Wei, David Brooks