Sciweavers

93 search results - page 12 / 19
» Diagnosis of Delay Defects Using Statistical Timing Models
Sort
View
SAC
2006
ACM
14 years 1 months ago
Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...
ISQED
2007
IEEE
152views Hardware» more  ISQED 2007»
14 years 1 months ago
Variation Aware Timing Based Placement Using Fuzzy Programming
In nanometer regime, the effects of variations are having an increasing impact on the delay and power characteristics of devices as well as the yield of the circuit. Statistical t...
Venkataraman Mahalingam, N. Ranganathan
FPGA
2007
ACM
142views FPGA» more  FPGA 2007»
14 years 1 months ago
Parametric yield in FPGAs due to within-die delay variations: a quantitative analysis
Variations in the semiconductor fabrication process results in variability in parameters between transistors on the same die, a problem exacerbated by lithographic scaling. The re...
N. Pete Sedcole, Peter Y. K. Cheung
ICCAD
2004
IEEE
147views Hardware» more  ICCAD 2004»
14 years 4 months ago
Interval-valued reduced order statistical interconnect modeling
9, IO]. However, unlike the case with static timing, it is not so easy We show how recent advances in the handling of correlated interval representations of range uncertainty can b...
James D. Ma, Rob A. Rutenbar
GLVLSI
2006
IEEE
185views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Application of fast SOCP based statistical sizing in the microprocessor design flow
In this paper we have applied statistical sizing in an industrial setting. Efficient implementation of the statistical sizing algorithm is achieved by utilizing a dedicated interi...
Murari Mani, Mahesh Sharma, Michael Orshansky