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» Diagnosis of Delay Defects Using Statistical Timing Models
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ITC
2003
IEEE
139views Hardware» more  ITC 2003»
14 years 18 days ago
Fault Pattern Oriented Defect Diagnosis for Memories
Failure analysis (FA) and diagnosis of memory cores plays a key role in system-on-chip (SOC) product development and yield ramp-up. Conventional FA based on bitmaps and the experi...
Chih-Wea Wang, Kuo-Liang Cheng, Jih-Nung Lee, Yung...
ICCAD
2006
IEEE
113views Hardware» more  ICCAD 2006»
14 years 4 months ago
A framework for statistical timing analysis using non-linear delay and slew models
Sarvesh Bhardwaj, Praveen Ghanta, Sarma B. K. Vrud...
ATS
2010
IEEE
229views Hardware» more  ATS 2010»
13 years 5 months ago
Variation-Aware Fault Modeling
Abstract--To achieve a high product quality for nano-scale systems both realistic defect mechanisms and process variations must be taken into account. While existing approaches for...
Fabian Hopsch, Bernd Becker, Sybille Hellebrand, I...
VTS
2008
IEEE
119views Hardware» more  VTS 2008»
14 years 1 months ago
Error Sequence Analysis
With increasing IC process variation and increased operating speed, it is more likely that even subtle defects will lead to the malfunctioning of a circuit. Various fault models, ...
Jaekwang Lee, Intaik Park, Edward J. McCluskey
VTS
2008
IEEE
136views Hardware» more  VTS 2008»
14 years 1 months ago
Test-Pattern Grading and Pattern Selection for Small-Delay Defects
Timing-related defects are becoming increasingly important in nanometer technology designs. Small delay variations induced by crosstalk, process variations, powersupply noise, as ...
Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Te...