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» Diagonal Circuit Identity Testing and Lower Bounds
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STOC
2010
ACM
168views Algorithms» more  STOC 2010»
14 years 5 months ago
Non-commutative circuits and the sum-of-squares problem
We initiate a direction for proving lower bounds on the size of non-commutative arithmetic circuits. This direction is based on a connection between lower bounds on the size of no...
Pavel Hrubes, Avi Wigderson and Amir Yehudayoff
ICCAD
1998
IEEE
96views Hardware» more  ICCAD 1998»
13 years 12 months ago
Test set compaction algorithms for combinational circuits
This paper presents two new algorithms, Redundant Vector Elimination(RVE) and Essential Fault Reduction (EFR), for generating compact test sets for combinational circuits under th...
Ilker Hamzaoglu, Janak H. Patel
DATE
2008
IEEE
104views Hardware» more  DATE 2008»
14 years 2 months ago
Multi-Vector Tests: A Path to Perfect Error-Rate Testing
The importance of testing approaches that exploit error tolerance to improve yield has previously been established. Error rate, defined as the percentage of vectors for which the...
Shideh Shahidi, Sandeep Gupta
STOC
1998
ACM
135views Algorithms» more  STOC 1998»
13 years 12 months ago
Checking Polynomial Identities over any Field: Towards a Derandomization?
We present a Monte Carlo algorithm for testing multivariate polynomial identities over any field using fewer random bits than other methods. To test if a polynomial P(x1 ::: xn) ...
Daniel Lewin, Salil P. Vadhan
ECCC
2010
117views more  ECCC 2010»
13 years 6 months ago
Nearly Tight Bounds for Testing Function Isomorphism
We study the problem of testing isomorphism (equivalence up to relabelling of the variables) of two Boolean functions f, g : {0, 1}n → {0, 1}. Our main focus is on the most stud...
Sourav Chakraborty, David García-Soriano, A...