410 search results - page 24 / 82 » Diagonal routing in high performance microprocessor design |
MOBIHOC
2006
ACM
14 years 8 months ago
2006
ACM
Traditionally, ad hoc networks have been viewed as a connected graph over which end-to-end routing paths had to be established. Mobility was considered a necessary evil that inval...
MICRO
2000
IEEE
13 years 8 months ago
2000
IEEE
High-performance microprocessors are currently designed to exploit the inherent instruction level parallelism (ILP) available in most applications. The techniques used in their de...
GLVLSI
2003
IEEE
14 years 1 months ago
2003
IEEE
In this paper, we present a novel hybrid multiplier architecture that has the regularity of linear array multipliers and the performance of tree multipliers and is highly scalable...
DAC
1996
ACM
14 years 18 days ago
1996
ACM
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...
DAC
2007
ACM
14 years 9 months ago
2007
ACM
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...