80 search results - page 10 / 16 » Differential Power Analysis in the Presence of Hardware Coun... |
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
Consideration of pairs of transition in probabilistic simulation allows power estimation for digital circuits in which inertial delays can filter glitches [5]. However, the merit ...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
Abstract-- SAT sweeping is the process of merging two or more functionally equivalent nodes in a circuit by selecting one of them to represent all the other equivalent nodes. This ...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
—This paper considers one type of common-mode feedback (CMFB) circuit that uses two differential pairs to sense the common-mode output voltage (Voc) of a fully differential op am...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
The SystemC modules of the Link Manager Layer and Baseband Layer have been designed in this work at behavioral level to analyze the performances of the Bluetooth standard. In part...
FPGA
2004
ACM
14 years 27 days ago
2004
ACM
Traditional metrics used to compare hardware designs include area, performance, and power. However, these metrics do not form a complete evaluation of reconfigurable hardware. For...