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DATE
2005
IEEE
100views Hardware» more  DATE 2005»
14 years 1 months ago
DPA on Quasi Delay Insensitive Asynchronous Circuits: Formalization and Improvement
The purpose of this paper is to formally specify a flow devoted to the design of Differential Power Analysis (DPA) resistant QDI asynchronous circuits. The paper first proposes a ...
G. Fraidy Bouesse, Marc Renaudin, Sophie Dumont, F...
VLSID
2006
IEEE
134views VLSI» more  VLSID 2006»
14 years 7 months ago
ADC Precision Requirement for Digital Ultra-Wideband Receivers with Sublinear Front-Ends: A Power and Performance Perspective
This paper presents the power and performance analysis of a digital, direct sequence ultra-wideband (DS-UWB) receiver operating in the 3 to 4 GHz band. The signal to noise and dis...
Ivan Siu-Chuang Lu, Neil Weste, Sri Parameswaran
ISLPED
2006
ACM
74views Hardware» more  ISLPED 2006»
14 years 1 months ago
Power phase variation in a commercial server workload
Many techniques have been developed for adaptive power management of computing systems. These techniques rely on the presence of varying power phases to detect opportunities for a...
W. L. Bircher, L. K. John
ICCAD
1996
IEEE
140views Hardware» more  ICCAD 1996»
13 years 11 months ago
Register-transfer level estimation techniques for switching activity and power consumption
We present techniques for estimating switching activity and power consumption in register-transfer level (RTL) circuits. Previous work on this topic has ignored the presence of gl...
Anand Raghunathan, Sujit Dey, Niraj K. Jha
DFT
2007
IEEE
101views VLSI» more  DFT 2007»
14 years 1 months ago
Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits
Many side-channel attacks on implementations of cryptographic algorithms have been developed in recent years demonstrating the ease of extracting the secret key. In response, vari...
Francesco Regazzoni, Thomas Eisenbarth, Johann Gro...