—This work presents an experimental investigation about the relation between specific characteristics of a digital circuit (clock frequency and architecture) and the substrate no...
Subthreshold circuits exhibit ultra-low energy per operation at the expense of increased delay. In this contribution, the impact of technology scaling on digital subthreshold circ...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...
We have fabricated a PCA (Principal Component Analysis) learning network in a FPGA (Field Programmable Gate Array) by using an asynchronous PDM (Pulse Density Modulation) digital ...
We describe a new method for design error diagnosis in digital circuits, that doesn’t use any error model. A diagnostic specific pre-analysis of the circuit extracts a subcircui...
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...
Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin C...