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» Dimensionality reduction and generalization
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144
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DAC
2003
ACM
15 years 9 months ago
Improved indexing for cache miss reduction in embedded systems
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
Tony Givargis
134
Voted
DIALM
2003
ACM
99views Algorithms» more  DIALM 2003»
15 years 9 months ago
Spatio-temporal data reduction with deterministic error bounds
A common way of storing spatio-temporal information about mobile devices is in the form of a 3D (2D geography + time) trajectory. We argue that when cellular phones and Personal D...
Hu Cao, Ouri Wolfson, Goce Trajcevski
151
Voted
PLDI
2003
ACM
15 years 9 months ago
The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction
This paper presents the design and implementation of a compiler algorithm that effectively optimizes programs for energy usage using dynamic voltage scaling (DVS). The algorithm ...
Chung-Hsing Hsu, Ulrich Kremer
GLVLSI
2010
IEEE
187views VLSI» more  GLVLSI 2010»
15 years 8 months ago
Write activity reduction on flash main memory via smart victim cache
Flash Memory is a desirable candidate for main memory replacement in embedded systems due to its low leakage power consumption, higher density and non-volatility characteristics. ...
Liang Shi, Chun Jason Xue, Jingtong Hu, Wei-Che Ts...
117
Voted
ASPDAC
1995
ACM
79views Hardware» more  ASPDAC 1995»
15 years 7 months ago
Search space reduction in high level synthesis by use of an initial circuit
Most existing high-level synthesis(HLS) systems attempt to generate a circuit from a behavioral description \out of the void", using the entire design space as the search dom...
Atsushi Masuda, Hiroshi Imai, Jeffery P. Hansen, M...