956 search results - page 74 / 192 » Dimensions in program synthesis |
ICFEM
2010
Springer
13 years 8 months ago
2010
Springer
Abstract. Automated verification of memory safety and functional correctness for heap-manipulating programs has been a challenging task, especially when dealing with complex data ...
IJACTAICIT
2010
13 years 7 months ago
2010
In this article, a hybrid optimization method has been proposed consisting of modified ant colony systems (ACSs) and constrained nonlinear programming (NLP) to solve the problems ...
DAC
2002
ACM
14 years 11 months ago
2002
ACM
This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
14 years 6 months ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
ICCAD
2007
IEEE
14 years 6 months ago
2007
IEEE
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...