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ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
14 years 5 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
ISMAR
2003
IEEE
14 years 2 months ago
Herding Sheep: Live System Development for Distributed Augmented Reality
In the past, architectures of Augmented Reality systems have been widely different and taylored to specific tasks. In this paper, we use the example of the SHEEP game to show how...
Asa MacWilliams, Christian Sandor, Martin Wagner, ...
ACMACE
2006
ACM
14 years 2 months ago
3DCG authoring system using turtle metaphor
A new type of Authoring System for 3DCG animation is developed in which a user can easily manipulate three dimensional objects in three dimensional simulated space on the computer...
Katsuhide Tsushima, Masayuki Ueno, Takeshi Nishiki...
CHI
2002
ACM
14 years 9 months ago
Tangibly simple, architecturally complex: evaluating a tangible presentation aid
In this paper, we describe an evaluation of the Palette, a presentation tool that was reported at CHI '99. The Palette allows presenters to quickly access digital presentatio...
Elizabeth F. Churchill, Les Nelson
PPL
2008
185views more  PPL 2008»
13 years 8 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...