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ICCS
2004
Springer
14 years 1 months ago
Platform-Independent Cache Optimization by Pinpointing Low-Locality Reuse
Abstract. For many applications, cache misses are the primary performance bottleneck. Even though much research has been performed on automatically optimizing cache behavior at the...
Kristof Beyls, Erik H. D'Hollander
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
14 years 24 days ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
ICCD
2007
IEEE
146views Hardware» more  ICCD 2007»
14 years 4 months ago
Exploring DRAM cache architectures for CMP server platforms
As dual-core and quad-core processors arrive in the marketplace, the momentum behind CMP architectures continues to grow strong. As more and more cores/threads are placed on-die, ...
Li Zhao, Ravi R. Iyer, Ramesh Illikkal, Donald New...
RSP
2003
IEEE
147views Control Systems» more  RSP 2003»
14 years 29 days ago
Cache Configuration Exploration on Prototyping Platforms
We describe cache architecture, intended for prototype-oriented IC platforms, that automatically finds the best cache configuration for a particular application. The cache itself ...
Chuanjun Zhang, Frank Vahid
ICPP
2008
IEEE
14 years 2 months ago
Taming Single-Thread Program Performance on Many Distributed On-Chip L2 Caches
This paper presents a two-part study on managing distributed NUCA (Non-Uniform Cache Architecture) L2 caches in a future manycore processor to obtain high singlethread program per...
Lei Jin, Sangyeun Cho