139 search results - page 4 / 28 » Distributed sleep transistor network for power reduction |
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
A new circuit technique is proposed in this paper for simultaneously reducing the subthreshold and gate oxide leakage power in domino logic circuits. PMOS-only sleep transistors ar...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
-- Power-gating is a technique for efficiently reducing leakage power by shutting off the idle blocks. However, the presence of power-gating may also introduce negative effects on ...
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
- A low overhead circuit technique is proposed in this paper for simultaneously reducing subthreshold and gate oxide leakage currents in domino logic circuits. PMOS sleep transisto...
ICNP
2002
IEEE
14 years 1 days ago
2002
IEEE
An ad hoc network is a group of mobile wireless nodes that cooperatively form a network among themselves without any fixed infrastructure. Increasingly, power consumption within ...
DATE
2005
IEEE
14 years 21 days ago
2005
IEEE
In this paper, two packing algorithms for the detection of activity profiles in MTCMOS-based FPGA structures are proposed for leakage power mitigation. The first algorithm is a ...