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97
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HPCA
2006
IEEE
16 years 3 months ago
ReViveI/O: efficient handling of I/O in highly-available rollback-recovery servers
The increasing demand for reliable computers has led to proposals for hardware-assisted rollback of memory state. Such approach promises major reductions in Mean Time To Repair (M...
Jun Nakano, Pablo Montesinos, Kourosh Gharachorloo...
106
Voted
HPCA
2006
IEEE
16 years 3 months ago
Probabilistic counter updates for predictor hysteresis and stratification
Hardware counters are a fundamental building block of modern high-performance processors. This paper explores two applications of probabilistic counter updates, in which the outpu...
Nicholas Riley, Craig B. Zilles
HPCA
2006
IEEE
16 years 3 months ago
Construction and use of linear regression models for processor performance analysis
Processor architects have a challenging task of evaluating a large design space consisting of several interacting parameters and optimizations. In order to assist architects in ma...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...
113
Voted
HPCA
2006
IEEE
16 years 3 months ago
A decoupled KILO-instruction processor
Building processors with large instruction windows has been proposed as a mechanism for overcoming the memory wall, but finding a feasible and implementable design has been an elu...
Miquel Pericàs, Adrián Cristal, Rube...
115
Voted
HPCA
2006
IEEE
16 years 3 months ago
CMP design space exploration subject to physical constraints
This paper explores the multi-dimensional design space for chip multiprocessors, exploring the inter-related variables of core count, pipeline depth, superscalar width, L2 cache s...
Yingmin Li, Benjamin C. Lee, David Brooks, Zhigang...
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