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HPCA
2005
IEEE
16 years 4 months ago
A Small, Fast and Low-Power Register File by Bit-Partitioning
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
Masaaki Kondo, Hiroshi Nakamura
HPCA
2003
IEEE
16 years 4 months ago
Power-Aware Control Speculation through Selective Throttling
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...
Juan L. Aragón, José González...
ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
16 years 1 months ago
Statistical Analysis of Power Grid Networks Considering Lognormal Leakage Current Variations with Spatial Correlation
— As the technology scales into 90nm and below, process-induced variations become more pronounced. In this paper, we propose an efficient stochastic method for analyzing the vol...
Ning Mi, Jeffrey Fan, Sheldon X.-D. Tan
GLOBECOM
2008
IEEE
15 years 11 months ago
Priority Based Power Saving Mode in WLAN
— According to employing Power Saving Mode (PSM) scheme or not, stations (STAs) in Wireless Local Area Networks can be classified into two categories: STAs using PSM (PSSTAs) an...
Fan Zhu, Zhisheng Niu
138
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ASAP
2005
IEEE
112views Hardware» more  ASAP 2005»
15 years 10 months ago
On the Advantages of Serial Architectures for Low-Power Reliable Computations
This paper explores low-power reliable microarchitectures for addition. Power, speed, and reliability (both defect- and fault-tolerance) are important metrics of system design, sp...
Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray R...